The Centre of Excellence in Advanced Packaging, a world-class research and development lab, has been officially inaugurated by Applied Materials and the Institute of Microelectronics (IME), a research institute of the Agency for Science, Technology and Research (A*STAR), at Science Park II in Singapore.
Both the companies have invested more than $100 million to construct the world-class facility, which is expected to be the world’s most advanced first of its kind wafer level packaging lab. The facility is dedicated to develop next-generation 3D chip packaging technologies for the semiconductor industry.
The Centre of Excellence in Advanced Packaging lab is equipped with an integrated line of 300 mm production systems and a Class-10 cleanroom. The joint R&D center will combine IME's expertise in 3D chip packaging research with advanced process technology and equipment from Applied Materials.
In general, chips are linked to packages with wires that are attached to their edges. This method limits the number of connections and also the long wire connections lead to power inefficiencies and signal speed delays. In case of 3D chip packaging, several chips can be stacked on each other using a wire that passes through the stack, which is termed as through-silicon vias (TSVs). This technology is anticipated to enhance data bandwidth in multiples of eight or more, reduce power consumption by 50% and minimize the package size by 35%.
The Centre of Excellence in Advanced Packaging will enable both the organizations to carry out independent research efforts, including hardware development, integration and process engineering. Professor Dim-Lee Kwong, IME’s Executive Director, remarked that the collaboration between Applied Materials and IME will spur the development and adoption of innovative wafer-level packaging technology globally.