New Processing System Reduces Defect Density in Semiconductors

Novellus Systems (NASDAQ: NVLS), a leading provider of advanced process equipment for the global semiconductor industry, has developed a sub-45nm, in-situ chamber clean process on the SPEED Max High Density Plasma (HDP) CVD gapfill platform that significantly reduces defect density and out-of-control (OOC) particle events. The key components of this process include efficient NF3 delivery and optimization of SPEED Max's unique "bright" (coil-assisted) and "dark" (remote plasma) cleans to effectively remove film build-up from targeted locations within the process environment.

Particle-induced Gapfill voids in a 45nm structure. A small particle on the order of the feature critical dimension (CD) can cause catastrophic gapfill issues, leading to device failure.

As device nodes shrink, memory and logic dielectric gapfill aspect ratios are creating a challenge for defect-free fill. Dielectric films that adhere to the process chamber components during the deposition process can be a source of particles and need to be efficiently removed on a periodic basis. The occurrence of a random "killer" defect event during the gapfill process, can cause a failure of the dielectric isolation between transistors or memory cells. Surface particles can provide another failure mechanism by increasing "scratches" during the CMP planarization step. Contaminants or interconnect metal deposited during subsequent process steps can fill in these voids or scratches, causing a high-current leakage path between the cells that results in lower yield or device failure. These random particle excursions also reduce system availability due to an increase in unscheduled downtime, and drive increased monitoring and qualification expenses. Achieving single digit particle performance with particle sizes less than 90nm in diameter will enable device manufacturers to enhance their 45nm yields, but will be a necessity to yield 32nm devices.

Novellus' new SPEED Max process reduces overall mean particle adders by a factor of 3x and OOC events by 50 percent. In addition to "bright" and "dark" cleans, these results are enabled by an isothermal environment and fluorine-resistant materials to minimize particle "shedding", a key contributor to random particle events. An additional benefit of this multi-step clean is a reduction in the amount of NF3 usage, further reducing customer costs.

"SPEED Max's unique 45nm process and hardware significantly reduce particle adders and OOC events during the gapfill process," says Doug Hayden, Novellus' director of technology, Gapfill business unit. "This latest innovation is reducing our customer's operating costs today by improving their system uptime and reducing their NF3 consumption."

For more information on Novellus' HDP-CVD gapfill technology, go to www.novellustechnews.com.

Novellus' SPEED Max system extends the HDP-CVD application into the 45 and 32 nm technology nodes. The system's isothermal chamber design, combined with a remote plasma source, allows more wafers to be processed between plasma cleans, and delivers superior throughput per system. In addition, the SPEED Max multi-port injection, together with isolated source technology, customizes the deposition and in-situ etching profile for optimal film thickness and gapfill uniformity across the wafer.

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