Reviewed by Lexie CornerJul 4 2024
A team of scientists from the Institute for Basic Science has developed a revolutionary technique for producing 1D metallic materials with a width of less than 1 nm by epitaxial growth. Using this method, the team created a new architecture for 2D semiconductor logic circuits. They employed the 1D metals as the ultra-miniaturized transistor's gate electrode. This research was published in the journal Nature Nanotechnology.
The team was led by Director Moon-Ho Jo of the Center for Van der Waals Quantum Solids within the Institute for Basic Science (IBS).
Integrated devices based on two-dimensional (2D) semiconductors demonstrate remarkable properties even at the ultimate limit of material thickness down to the atomic scale. These devices are a major focus of basic and applied research globally.
Significant technical obstacles must be overcome to realize such ultra-miniaturized transistor devices that can regulate the movement of electrons within a few nm, let alone create a manufacturing process for these integrated circuits.
The width and control efficiency of the gate electrode, which regulates the flow of electrons in the transistor, are critical factors in determining the degree of integration in semiconductor devices. Due to the constraints of lithography resolution, it is impossible to reduce the gate length in typical semiconductor production techniques to a few nm.
The study team used the fact that molybdenum disulfide (MoS₂), a 2D semiconductor, has a mirror twin boundary (MTB) that is a 1D metal with a width of only 0.4 nm to solve this technical puzzle. To get around the lithography process's restrictions, they employed this as a gate electrode.
In this work, the 2D semiconductor that was already in use was converted into a 1D MTB metallic phase by atomically altering its crystal structure. This is a significant advance in fundamental materials science and next-generation semiconductor technology, as it shows how to artificially synthesize new material phases on a massive scale by manipulating crystal structures.
According to the IEEE's International Roadmap for Devices and Systems (IRDS), transistor gate lengths will reach 12 nm by 2037, while semiconductor node technology will have reached about 0.5 nm. The study team showed that, in contrast to the predicted prediction, the channel width regulated by the electric field generated from the 1D MTB gate can be as tiny as 3.9 nm.
The research team's 1D MTB-based transistor has benefits for improved circuit performance as well. As a result of their intricate device architectures, technologies like FinFET and Gate-All-Around, which were used to miniaturize silicon semiconductor devices, suffer from parasitic capacitance, which causes instability in highly integrated circuits.
On the other hand, because of its incredibly low gate width and straightforward construction, the 1D MTB-based transistor can reduce parasitic capacitance.
The 1D metallic phase achieved through epitaxial growth is a new material process that can be applied to ultra-miniaturized semiconductor processes. It is expected to become a key technology for developing various low-power, high-performance electronic devices in the future.
Moon-Ho Jo, Director, Center for Van der Waals Quantum Solids, Institute for Basic Science
Journal Reference:
Ahn, H., et al. (2024) Integrated 1D epitaxial mirror twin boundaries for ultrascaled 2D MoS2 field-effect transistors. Nature Nanotechnology. doi.org/10.1038/s41565-024-01706-1.