STATS ChipPAC has declared the completion of the capacity expansion of its 300-mm wafer level chip scale packaging (WLCSP) and wafer bump facility located in Taiwan.
STATS ChipPAC has spent over $150 million for the capacity expansion at STATS ChipPAC Taiwan, which can now produce 60,000 WLCSP devices and 420,000 bumped wafers annually.
For the production of WLCSP devices, all of the production processes need to be carried out in parallel with the silicon wafer level instead of sequentially on single chips, resulting in a package having a size same as that of the die. This compact semiconductor package has enhanced thermal performance, improved functionality and finer pitch interlink to the printed circuit board.
The sophisticated wafer level processes such as low cure temperature polymers and the application of copper for redistribution layers and bump metallization at STATS ChipPAC Taiwan provide improved reliability of packages and higher densities.
STATS ChipPAC’s Executive Vice President and Chief Operating Officer, Wan Choong Hoe stated that the company has considerably augmented its capability to support its customers having 300-mm wafer production capacity and offers low-cost packaging solutions by leveraging the advantages of the economy of scale and superior efficiencies.
STATS ChipPAC Taiwan’s Managing Director, Richard Weng stated that the integration of the completely built-in wafer level processing capabilities at its Hsin-chu Hsien plant allows the company to offer high-density, low-cost wafer level packaging systems for lightweight, thin, portable products. The company has expanded its Class 100 cleanroom space to 37,437 sq. ft. and drastically increased the capacity of its 300-mm WLCSP and bump, enabling the company to offer technology processes supporting bump pitches down to 40µm, Weng said.