Oct 19 2013
Xilinx, Inc. today announced that its Virtex®-7 H580T FPGA was presented as winner of the SoC and Programmable Logic category in the 2013 Innovation Awards, organized by Italian magazine Selezione di Elettronica. Presented at the Innovation Award Gala on September 26 in Milan, Xilinx was awarded the winner among 11 other entrants.
The Italian engineering community chose Xilinx for achieving an industry milestone with its All Programmable 3D heterogeneous product that helps system designers overcome bandwidth challenges, accelerate design productivity, and meet the needs of next generation smarter networks.
"Since first silicon Virtex-7 H580T FPGAs started shipping last May, we have received tremendous feedback from customers on its high capacity and signal integrity," commented Dave Myron, Sr. Director, FPGA Marketing at Xilinx. "Winning this award recognizes the space, power and cost reduction advantages of the Virtex-7 H580T FPGAs over competing ASSP and ASIC, addressing Nx100G and 400G line card applications."
"Xilinx's Virtex-7 H580T FPGA is the first heterogenous All Programmable 3D IC and is an important milestone to bring 3D technology on the market," said Laura Reggiani, Editor-in-Chief Selezione di Elettronica. "Our readers and the technical committee appreciated the inter-die bandwidth improvement offered by Xilinx's Stacked Silicon Interconnect technology over multi-chip approaches. This programmable solution offers the opportunity to leverage multiple FPGAs to meet the requirements of the next generation of CFP2 optical modules."
Xilinx's Virtex-7 H580T FPGA was chosen due to its unmatched functionality, power and technical innovations required to build and deliver this product to market. Selected as a distinguished processor (FPGA), the Virtex-7 H580T FPGA is the world's first 3D heterogeneous All Programmable device. Using Xilinx's Stacked Silicon Interconnect (SSI) technology, the heterogeneous implementation allowed Xilinx to make independent technology choices for the core FPGA and transceiver die, enabling unmatched capacity, bandwidth and integration of 28 Gbps transceivers unseen today not only by competitive FPGA devices, but also by ASSPs.