Feb 15 2009
Without robust and affordable next-generation lithography, the current semiconductor roadmap could change dramatically. For 22nm and beyond, patterning candidates such as EUVL*, nano-imprint, direct write and optical double patterning methods show promise. But which one will deliver the best balance of performance and cost? On February 25, in San Jose, California, Applied Materials will host an important seminar exploring this critical topic.
Titled “Next Generation Lithography Technologies: Yielding Moore with Less,” the forum will be led by Dr. Hans Stork, chief technology officer of Applied Materials’ Silicon Systems Group. The program will feature an afternoon of technical presentations discussing new patterning, inspection and metrology techniques and their influence on lithography. The presentations will be followed by an exploratory look into the world of 22nm chip design with a live demonstration of decomposition tools for 22nm sidewall spacer double patterning. Experts drawn from academia; circuit design; and logic, memory and foundry manufacturing will round out the program with a spirited debate on lithography technology for the future.
Panel:
- Jongwook Kye – AMD, Inc.
- Burn Lin – TSMC, Ltd.
- Steve Radigan – SanDisk Corporation
- Milind Weling – Cadence Design Systems, Inc.
- Grant Willson – University of Texas at Austin
- Ken MacWilliams – Applied Materials, Moderator
Where: The Sainte Claire Hotel, 302 S Market Street, San Jose, CA 95113
When: Wednesday, February 25, 2009
Schedule:
3:00pm-3:30pm Registration
3:30pm-5:00pm Seminar program
5:00pm-5:30pm Live demonstration of 22nm sidewall spacer design software
5:30pm-6:45pm Panel discussion
6:45pm-8:30pm Reception
For more information on this compelling event, please visit www.appliedmaterials.com/2009_SPIE.